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GS8673ED18BK-550 Datasheet(PDF) 5 Page - GSI Technology

Part # GS8673ED18BK-550
Description  72Mb SigmaQuad-IIIe??Burst of 4 ECCRAM?
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Manufacturer  GSI [GSI Technology]
Direct Link  http://www.gsitechnology.com
Logo GSI - GSI Technology

GS8673ED18BK-550 Datasheet(HTML) 5 Page - GSI Technology

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GS8673ED18/36BK-675/625/550/500
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.06 5/2012
5/31
© 2011, GSI Technology
MZT[1:0]
Input Termination Mode Select—Selects the termination mode used for all terminated inputs. Must be tied
High or Low.
MZT[1:0] = 00: disabled.
MZT[1:0] = 01: RT/2 Thevenin-equivalent (pull-up = RT, pull-down = RT).
MZT[1:0] = 10: RT Thevenin-equivalent (pull-up = 2*RT, pull-down = 2*RT).
MZT[1:0] = 11: reserved.
Input
PZT[1:0]
Input Termination Configuration Select—Selects which inputs are terminated. Must be tied High or Low.
PZT[1:0] = 00: Write Data only.
PZT[1:0] = 01: Write Data, Input Clocks.
PZT[1:0] = 10: Write Data, Address, Control.
PZT[1:0] = 11: Write Data, Address, Control, Input Clocks.
Input
MVQ
I/O Voltage Select—Indicates what voltage is supplied to the VDDQ pins. Must be tied High or Low.
MVQ = 0: Configure for 1.2V to 1.35V nominal VDDQ.
MVQ = 1: Configure for 1.5V nominal VDDQ.
Input
VDD
Core Power Supply—1.35V nominal core supply voltage.
VDDQ
I/O Power Supply—1.2V to 1.5V nominal I/O supply voltage. Configurable via MVQ pin.
VREF
Input Reference Voltage—Input buffer reference voltage.
VSS
Ground
TCK
JTAG Clock
Input
TMS
JTAG Mode Select—Weakly pulled High internally.
Input
TDI
JTAG Data Input—Weakly pulled High internally.
Input
TDO
JTAG Data Output
Output
MCH
Must Connect High—May be tied to VDDQ directly or via a 1kΩ resistor.
Input
MCL
Must Connect Low—May be tied to VSS directly or via a 1kΩ resistor.
Input
NC
No Connect—There is no internal chip connection to these pins. They may be left unconnected, or tied High
or Low.
NUI
Not Used, Input—There is an internal chip connection to these input pins, but they are unused by the
device. They are pulled Low internally. They may be left unconnected or tied Low. They should not be tied
High.
Input
NUO
Not Used, Output—There is an internal chip connection to these output pins, but they are unused by the
device. Unused output pins are tri-stated internally. They should be left unconnected.
Output
Pin Description (Continued)
Symbol
Description
Type


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