Electronic Components Datasheet Search |
|
SP3232EBCT-L Datasheet(PDF) 10 Page - Exar Corporation |
|
SP3232EBCT-L Datasheet(HTML) 10 Page - Exar Corporation |
10 / 24 page In most circumstances, decoupling the power supply can be achieved adequately using a 0.1µF bypass capacitor at C5 (refer to figures 8 and 9) In applications that are sensitive to power- supply noise, decouple Vcc to ground with a capacitor of the same value as charge-pump capacitor C1. Physically connect bypass capcitors as close to the IC as possible. The charge pump operates in a discontinu- ous mode using an internal oscillator. If the output voltages are less than a magnitude of 5.5V, the charge pump is enabled. If the output voltages exceed a magnitude of 5.5V, the charge pump is disabled. This oscillator controls the four phases of the voltage shift- ing. A description of each phase follows. Phase 1 — V SS charge storage — During this phase of the clock cycle, the positive side of capaci- tors C 1 and C2 are initially charged to VCC. C l + is then switched to GND and the charge in C 1 – is transferred to C 2 –. Since C 2 + is con- nected to V CC, the voltage potential across capacitor C 2 is now 2 times VCC. Phase 2 — V SS transfer — Phase two of the clock connects the negative terminal of C 2 to the VSS storage capacitor and the positive terminal of C 2 to GND. This transfers a negative gener- ated voltage to C 3. This generated voltage is regulated to a minimum voltage of -5.5V. Simultaneous with the transfer of the volt- age to C 3, the positive side of capacitor C1 is switched to V CC and the negative side is connected to GND. Phase 3 — V DD charge storage — The third phase of the clock is identical to the first phase — the charge transferred in C 1 produces –VCC in the negative terminal of C 1, which is applied to the negative side of capacitor C 2. Since C 2 + is at V CC, the voltage potential across C2 is 2 times V CC. Phase 4 — V DD transfer — The fourth phase of the clock connects the negative terminal of C 2 to GND, and transfers this positive generated voltage across C 2 to C 4, the V DD storage capacitor. This voltage is regulated to +5.5V. At this voltage, the in- ternal oscillator is disabled. Simultaneous with the transfer of the voltage to C 4, the positive side of capacitor C 1 is switched to V CC and the negative side is con- nected to GND, allowing the charge pump cycle to begin again. The charge pump cycle will continue as long as the operational conditions for the internal oscillator are present. Since both V+ and V– are separately gener- ated from V CC, in a no–load condition V + and V– will be symmetrical. Older charge pump approaches that generate V– from V+ will show a decrease in the magnitude of V– compared to V+ due to the inherent inefficiencies in the design. The clock rate for the charge pump typically operates at greater than 250kHz. The exter- nal capacitors can be as low as 0.1µF with a 16V breakdown voltage rating. DESCRIPTION 10 Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7000 • www.exar.com SP3222EB/SP3232EB_106_022316 |
Similar Part No. - SP3232EBCT-L |
|
Similar Description - SP3232EBCT-L |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.NET |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |