LC898217XH

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8

8.2 AC specification

Figure 8.2 shows interface timing definition and Table 8.1 shows electric characteristics.

tBUF

tSU,STO

tHD,STA

tSU,STA

tSU,DAT

tHD,DAT

tLOW

tr

tf

tHD,STA

SDA

SCL

VIHmin

VILmax

tf

tr

Start

Condition

Repeated

Condition

Stop

Condition

Start

Condition

VIHmin

VILmax

Figure 8.2 2-wire serial interface timing definition

Table 8.1 Electric characteritics for 2-wire serial interface (AC characteristics)

Item

Symbol

Pin name

Fast-mode

Fast-mode Plus

Unit

Min

Typ

Max

Min

Typ

Max

SCL clock frequency

FSCL

SCL

400

1000

kHz

START condition

hold time

tHD, STA

SCL

SDA

0.6

0.26

µs

SCL clock

Low period

tLOW

SCL

1.3

0.5

µs

SCL clock

High period

tHIGH

SCL

0.6

0.26

µs

Setup time for repetition

START condition

tSU, STA

SCL

SDA

0.6

0.26

µs

Data hold time

tHD, DAT

SCL

SDA

0 *

0.9

0 *

µs

Data setup time

tSU, DAT

SCL

SDA

100

50

ns

SDA, SCL

rising time

tr

SCL

SDA

300

120

ns

SDA, SCL

falling time

tf

SCL

SDA

300

120

ns

STOP condition setup time

tSU, STO

SCL

SDA

0.6

0.26

µs

Bus free time between

STOP and START

tBUF

SCL

SDA

1.3

0.5

µs

* : LC898217XH is designed for a condition with typ. 20 ns of hold time. If SDA signal is unstable around falling point of SCL

signal, please implement an appropriate treatment on board, such as inserting a resistor.