W681511

Publication Release Date: December 4, 2002

- 9 -

Revision A9

AI+

Input Amplifier

Input

Powered Down

AO

Powered Up

AI+, AI-

Powered Down

AI-

Table 7.1 Input Amplifier Modes of operation

When the input amplifier is powered down, the input signal at AO or AI- needs to be referenced to the

The output of the input amplifier is fed through a low-pass filter to prevent aliasing at the switched

capacitor 3.4 kHz low pass filter. The 3.4 kHz switched capacitor low pass filter prevents aliasing of

input signals above 4 kHz, due to the sampling at 8 kHz. The output of the 3.4 kHz low pass filter is

filtered by a high pass filter with a 200 Hz cut-off frequency. The filters are designed according to the

recommendations in the G.712 ITU-T specification. From the output of the high pass filter the signal is

digitized. The signal is converted into a compressed 8-bit digital representation with either

µ-Law or A-

Law format. The

µ-Law or A-Law format is pin-selectable through the µ/A-Law pin. The compression

format can be selected according to Table 7.2.

µ/A-Law Pin

Format

A-Law

µ-Law

Table 7.2. Pin-selectable Compression Format

The digital 8-bit

µ-Law or A-Law samples are fed to the PCM interface for serial transmission at the

sample rate supplied by the external frame sync FST.

7.2. Receive Path

The 8-bit digital input samples for the D-to-A path are serially shifted in by the PCM interface and

converted to parallel data bits. During every cycle of the frame sync FSR, the parallel data bits are fed

through the pin-selectable

µ-Law or A-Law expander and converted to analog samples. The mode of

expansion is selected by the

µ/A-Law pin as shown in Table 7.2. The analog samples are filtered by a

low-pass smoothing filter with a 3.4 kHz cut-off frequency, according to the ITU-T G.712 specification.

A sin(x)/x compensation is integrated with the low pass smoothing filter. The output of this filter is

buffered to provide the receive output signal RO+. The RO+ output can be externally connected to the

PAI pin to provide a differential output with high driving capability at the PAO+ and PAO- pins. By

using external resistors (see section 11 for examples), various gain settings of this output amplifier

can be achieved. If the transmit power amplifier is not in use, it can be powered down by connecting