AD9655

Data Sheet

Table 2.

Temperature

Min

Typ

Max

Unit

RESOLUTION

16

Bits

ACCURACY

No Missing Codes

Full

Offset Error

Full

−0.12

+0.2

+0.48

% FSR

Offset Matching

Full

−0.2

+0.1

+0.33

% FSR

Gain Error

Full

−2.4

+2.8

+8.2

% FSR

Gain Matching

Full

−1.2

+0.4

+1.9

% FSR

Differential Nonlinearity (DNL)

Full

−0.99

+1.43

LSB

25°C

±0.7

LSB

Integral Nonlinearity (INL)

Full

−8.5

+8.5

LSB

25°C

±3.4

LSB

TEMPERATURE DRIFT

Gain Error

Full

−66

ppm/°C

Offset Error

Full

0.9

ppm/°C

INTERNAL VOLTAGE REFERENCE

Output Voltage (1.4 V Mode)

Full

1.37

1.38

1.41

V

25°C

186

mV

Input Resistance

25°C

7.5

kΩ

INPUT-REFERRED NOISE

25°C

2

LSB rms

ANALOG INPUTS

Full

2.8

V p-p

Common-Mode Voltage

Full

0.9

V

Common-Mode Range

25°C

0.7

1.0

V

Differential Input Resistance

25°C

1.9

kΩ

Differential Input Capacitance

25°C

6.6

pF

POWER SUPPLY

AVDD

Full

1.7

1.8

1.9

V

DRVDD

Full

1.7

1.8

1.9

V

Full

101

111

mA

Full

73

79

mA

Full

62

68

mA

TOTAL POWER CONSUMPTION

Sine Wave Input (Two Channels, Including Output Drivers ANSI-644 Mode)

Full

313

342

mW

Sine Wave Input (Two Channels, Including Output Drivers Reduced Range Mode)

Full

293

322

mW

Power-Down

Full

2

4

mW

Full

155

172

mW

1

See the AN-835 Application Note, Understanding High Speed ADC Testing and Evaluation, for definitions and for details on how these tests were completed.

2

No missing codes guaranteed if Register 0x18 = 0x04 (default, no digital scaling of the output).

3

Measured with a low input frequency, −1 dBFS sine wave on both channels, DDR operation, and two-lane operation.

4

Standby mode can be controlled via the SPI.

Rev. 0 | Page 4 of 37