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AD9644BCPZ-155 Datasheet(PDF) 3 Page - Analog Devices |
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AD9644BCPZ-155 Datasheet(HTML) 3 Page - Analog Devices |
3 / 45 page AD9644 Data Sheet Rev. C | Page 2 of 44 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 Functional Block Diagram .............................................................. 1 Product Highlights ........................................................................... 1 Revision History ............................................................................... 2 General Description......................................................................... 3 Specifications..................................................................................... 4 ADC DC Specifications............................................................... 4 ADC AC Specifications ............................................................... 5 Digital Specifications ................................................................... 6 Switching Specifications .............................................................. 8 Timing Specifications .................................................................. 9 Absolute Maximum Ratings.......................................................... 10 Thermal Characteristics ................................................................ 10 ESD Caution................................................................................ 10 Pin Configuration and Function Descriptions........................... 11 Typical Performance Characteristics ........................................... 13 Equivalent Circuits......................................................................... 19 Theory of Operation ...................................................................... 20 ADC Architecture ...................................................................... 20 Analog Input Considerations.................................................... 20 Voltage Reference ....................................................................... 22 Clock Input Considerations...................................................... 22 Channel/Chip Synchronization................................................ 24 Power Dissipation and Standby Mode .................................... 24 Digital Outputs ........................................................................... 24 Built-In Self-Test (BIST) and Output Test .................................. 29 Built-In Self-Test (BIST)............................................................ 29 Output Test Modes..................................................................... 29 Serial Port Interface (SPI).............................................................. 31 Configuration Using the SPI..................................................... 31 Hardware Interface..................................................................... 32 SPI Accessible Features.............................................................. 32 Memory Map .................................................................................. 33 Reading the Memory Map Register Table............................... 33 Memory Map Register Table..................................................... 34 Memory Map Register Descriptions........................................ 38 Applications Information .............................................................. 42 Design Guidelines ...................................................................... 42 Outline Dimensions....................................................................... 43 Ordering Guide .......................................................................... 43 REVISION HISTORY 1/12—Rev. B to Rev. C Change to General Description Section........................................ 3 6/11—Rev. A to Rev. B Added Figure 23 to Figure 40; Renumbered Sequentially ........ 16 Changes to Clock Input Considerations Section........................ 22 Added Figure 61.............................................................................. 24 Changes to Digital Outputs and Timing Section ....................... 27 Added Figure 69.............................................................................. 28 Changes to Output Test Modes Section ...................................... 29 Changes to SPI Accessible Features Section ............................... 32 4/11—Rev. 0 to Rev. A Added Model -155......................................................... Throughout Changes to Features Section and Figure 1 .....................................1 Changes to General Description Section .......................................3 Changes to Table 1.............................................................................4 Changes to Table 2.............................................................................5 Changes to Table 4.............................................................................8 Additions to TPC Introductory Statement ................................. 13 Changes to Speed Grade ID Bits in Table 17 .............................. 31 Changes to Ordering Guide.......................................................... 40 6/10—Revision 0: Initial Version |
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