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AD9683BCPZ-250 Datasheet(PDF) 8 Page - Analog Devices |
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AD9683BCPZ-250 Datasheet(HTML) 8 Page - Analog Devices |
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8 / 45 page  Data Sheet AD9683 Rev. D | Page 7 of 44 Parameter Temperature Min Typ Max Unit SYSREF INPUTS (SYSREF+/SYSREF−) Logic Compliance LVDS Internal Common-Mode Bias Full 0.9 V Differential Input Voltage Range Full 0.3 3.6 V p-p Input Voltage Range Full AGND AVDD V Input Common-Mode Range Full 0.9 1.4 V High Level Input Current Full −5 +5 µA Low Level Input Current Full −10 +10 µA Input Capacitance Full 4 pF Input Resistance Full 8 10 12 kΩ LOGIC INPUT (RST)1 High Level Input Voltage Full 1.22 2.1 V Low Level Input Voltage Full 0 0.6 V High Level Input Current Full −5 +5 µA Low Level Input Current Full −100 −45 µA Input Resistance Full 26 kΩ Input Capacitance Full 2 pF LOGIC INPUTS (SCLK, PDWN, CS2)3 High Level Input Voltage Full 1.22 2.1 V Low Level Input Voltage Full 0 0.6 V High Level Input Current Full 45 100 µA Low Level Input Current Full −10 +10 µA Input Resistance Full 26 kΩ Input Capacitance Full 2 pF LOGIC INPUT (SDIO)3 High Level Input Voltage Full 1.22 2.1 V Low Level Input Voltage Full 0 0.6 V High Level Input Current Full 45 100 µA Low Level Input Current Full −10 +10 µA Input Resistance Full 26 kΩ Input Capacitance Full 5 pF DIGITAL OUTPUTS (SERDOUT0+/SERDOUT0−) Logic Compliance CML Differential Output Voltage (VOD) Full 400 600 750 mV Output Offset Voltage (VOS) Full 0.75 DRVDD/2 1.05 V DIGITAL OUTPUTS (SDIO/FD4) High Level Output Voltage (VOH) IOH = 50 µA Full 1.79 V IOH = 0.5 mA Full 1.75 V IOH = 2.0 mA Full 1.6 V Low Level Output Voltage (VOL) IOL = 2.0 mA Full 0.25 V IOL = 1.6 mA Full 0.2 V IOL = 50 µA Full 0.05 V 1 Pull-up. 2 Needs an external pull-up. 3 Pull-down. 4 Compatible with JEDEC standard JESD8-7A. |
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Similar Description - AD9683BCPZ-250 |
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