FLASH MEMORY

11

K9K1G08U0B

K9K1G08R0B

Advance

K9K1G08B0B

Program / Erase Characteristics

Parameter

Symbol

Min

Typ

Max

Unit

Program Time

-

200

500

µs

Dummy Busy Time for Multi Plane Program

110

µs

Number of Partial Program Cycles

in the Same Page

Main Array

Nop

--

1

cycle

Spare Array

-

-

2

cycles

Block Erase Time

-2

3

ms

NOTE : Capacitance is periodically sampled and not 100% tested.

Item

Symbol

Test Condition

Min

Max

Unit

Input/Output Capacitance

-

20

pF

Input Capacitance

-

20

pF

AC TEST CONDITION

(K9K1G08X0B-XCB0 :TA=0 to 70

°C, K9K1G08X0B-XIB0 :TA=-40 to 85°C

K9K1G08R0B : Vcc=1.65V~1.95V , K9K1G08B0B : Vcc=2.5V~2.9V, K9K1G08U0B : Vcc=2.7V~3.6V unless otherwise noted)

Parameter

K9K1G08R0B

K9K1G08B0B

K9K1G08U0B

Input Pulse Levels

0.4V to 2.4V

Input Rise and Fall Times

5ns

5ns

5ns

Input and Output Timing Levels

1.5V

1 TTL GATE and CL=30pF 1 TTL GATE and CL=30pF 1 TTL GATE and CL=50pF

-

-

1 TTL GATE and CL=100pF

MODE SELECTION

2. WP should be biased to CMOS high or CMOS low for standby.

CLE

ALE

CE

WE

RE

WP

Mode

HL

L

H

X

Read Mode

Command Input

L

H

L

H

X

Address Input(4clock)

HL

L

H

H

Write Mode

Command Input

L

H

L

H

H

Address Input(4clock)

L

L

L

H

H

Data Input

L

L

L

H

X

Data Output

X

X

X

X

H

X

During Read(Busy) on the devices

X

X

X

X

X

H

During Program(Busy)

X

X

X

X

X

H

During Erase(Busy)

X

X

X

X

L

Write Protect

XX

H

X

X

NOTE : 1.Typical program time is defined as the time within which more than 50% of the whole pages are programmed at Vcc of 3.3V and 25’C