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APLS0700-R Datasheet(PDF) 1 Page - Advanced Semiconductor Business Inc. |
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APLS0700-R Datasheet(HTML) 1 Page - Advanced Semiconductor Business Inc. |
1 / 2 page 1/2 www.asb.co.kr March 2016 plerowTM APLS0700-R PLL Synthesizer Module Parameter Unit Min. Typical Max. Frequency Range MHz 700 Output Power dBm 7.5 Supply Voltage V 5 Current Consumption mA 21 2nd Harmonics dBc -25 Spurious Level dBc -65 -60 Reference Frequency MHz 10 Reference Input Level dBm 0 Phase Noise (C / N) @ 1 kHz dBc/Hz -83 @ 10 kHz -105 @ 100 kHz -121 Output Impedance 50 Operating Temp. Range C -40 25 85 Package Type & Size mm SMT, 12.7W 12.7L3H 1) Measurement conditions are as follows: T = 25 C, V CC = 5 V, Freq. = 700 MHz, 50 ohm system. 2) The phase noise tolerance could be within +/- 2 dBc/Hz depending upon the noise applied to PLL from the dc power supplier. Specifications More Information Website: www.asb.co.kr E-mail: sales@asb.co.kr Tel: (82) 42-528-7220 Fax: (82) 42-528-7222 ASB Inc., 44-14, Techno 10-ro, Yuseong-gu Daejeon, 305-510, Korea Description The plerowTM PLL synthesizer module was designed for use in wireless and wire- line systems in a wide range of frequency from 50 MHz to 6 GHz. ASB ’s PLL pro- vides exceptionally low spurious and phase noise performance with fast locking time and low current consumption. All products are available in a surface-mount type package. |
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