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TLV1704 Datasheet(PDF) 5 Page - Texas Instruments |
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TLV1704 Datasheet(HTML) 5 Page - Texas Instruments |
5 / 27 page 5 TLV1701-Q1, TLV1702-Q1, TLV1704-Q1 www.ti.com SLOS890B – NOVEMBER 2015 – REVISED SEPTEMBER 2017 Product Folder Links: TLV1701-Q1 TLV1702-Q1 TLV1704-Q1 Submit Documentation Feedback Copyright © 2015–2017, Texas Instruments Incorporated (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) Input pins are diode-clamped to the power-supply rails. Input signals that can swing more than 0.5 V beyond the supply rails must be current limited to 10 mA or less. (3) Short-circuit to ground; one comparator per package. 7 Specifications 7.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) MIN MAX UNIT Supply voltage 40 (±20) V Signal input pins Voltage(2) (VS–) – 0.5 (VS+) + 0.5 V Current(2) ±10 mA Output short-circuit(3) Continuous mA Operating temperature –55 150 °C Junction temperature, TJ 150 °C Storage temperature, Tstg –65 150 °C (1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification. 7.2 ESD Ratings VALUE UNIT TLV1701-Q1 V(ESD) Electrostatic discharge Human-body model (HBM), per AEC Q100-002(1) ±2000 V Charged-device model (CDM), per AEC Q100-011 ±1000 TLV1702-Q1 V(ESD) Electrostatic discharge Human-body model (HBM), per AEC Q100-002(1) ±1000 V Charged-device model (CDM), per AEC Q100-011 ±1000 TLV1704-Q1 V(ESD) Electrostatic discharge Human-body model (HBM), per AEC Q100-002(1) ±1000 V Charged-device model (CDM), per AEC Q100-011 ±1000 7.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) MIN NOM MAX UNIT Supply voltage VS = (VS+) – (VS–) 2.2 (±1.1) 36 (±18) V Specified temperature –40 125 °C (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. 7.4 Thermal Information THERMAL METRIC(1) TLV1701-Q1 TLV1702-Q1 TLV1704-Q1 UNIT DBV (SOT-23) DGK (VSSOP) PW (TSSOP) 5 PINS 8 PINS 14 PINS RθJA Junction-to-ambient thermal resistance 233.1 199 128.1 °C/W RθJC(top) Junction-to-case (top) thermal resistance 156.4 89.5 56.5 °C/W RθJB Junction-to-board thermal resistance 60.6 120.4 69.9 °C/W ψJT Junction-to-top characterization parameter 35.7 22 9.1 °C/W ψJB Junction-to-board characterization parameter 59.7 118.7 69.3 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance N/A N/A N/A °C/W |
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