TLV702-Q1

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SLVSC35B – AUGUST 2013 – REVISED JUNE 2015

Feature Description (continued)

7.3.2 Shutdown

The enable pin (EN) is active high. The device is enabled when voltage at EN pin exceeds 0.9 V. The device is

turned off when the EN pin is held at less than 0.4 V. When shutdown capability is not required, connect the EN

pin to the IN pin.

7.3.3 Dropout Voltage

approximately with output current because the PMOS device behaves as a resistor in dropout.

This effect is shown in Figure 13.

7.3.4 Undervoltage Lockout

The TLV702-Q1 uses a UVLO circuit to keep the output shut off until internal circuitry is operating properly.

7.4 Device Functional Modes

7.4.1 Normal Operation

The device regulates to the nominal output voltage under the following conditions:

•

The input voltage is greater than the nominal output voltage added to the dropout voltage.

•

The output current is less than the current limit.

•

The input voltage is greater than the UVLO voltage.

7.4.2 Dropout Operation

If the input voltage is less than the nominal output voltage plus the specified dropout voltage, but all other

conditions are met for normal operation, the device operates in dropout mode. In this condition, the output

voltage is the same as the input voltage minus the dropout voltage. The transient performance of the device is

significantly degraded because the pass device is in a triode state and no longer regulates the output voltage of

the LDO. Line or load transients in dropout may result in large output voltage deviations.

Table 1 lists the conditions that lead to the different modes of operation.

Table 1. Device Functional Mode Comparison

PARAMETER

OPERATING MODE

Normal mode

Dropout mode

Current limit

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