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STK12C68-5L45M Datasheet(PDF) 8 Page - List of Unclassifed Manufacturers

Part No. STK12C68-5L45M
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cells. The nonvolatile data can be recalled an
unlimited number of times.
During power up, or after any low power condition
CAP < VSWITCH), when VCAP exceeds the sense
voltage of V
SWITCH, a RECALL cycle will automatically
be initiated. After the initiation of this automatic RE-
, if V
CAP falls below VSWITCH, then another RE-
operation will be performed whenever V
again rises above V
If the STK12C68-M is in a WRITE state at the end of
RECALL, the SRAM data will be corrupted.
To help avoid this situation, a 10K Ohm resistor should
be connected between W and system V
The STK12C68-M offers hardware protection against
STORE operation
during low voltage
When V
CAP < VSWITCH, all externally
initiated STORE operations will be inhibited.
The Hardware Store Busy pin (HSB) is an open drain
circuit acting as both input and output to perform two
different functions. When driven low by the internal
chip circuitry it indicates that a STORE operation (initi-
ated via any means) is in progress within the chip.
When driven low by external circuitry for longer than
ASSERT, the chip will conditionally initiate a STORE
operation after t
and WRITE operations that are in progress when
HSB is driven low (either by internal or external cir-
cuitry) will be allowed to complete before the STORE
operation is performed, in the following manner. After
HSB goes low, the part will continue normal SRAM
operations for t
DELAY. During tDELAY, a transition on
any address or control signal will terminate SRAM
operation and cause the STORE to commence. Note
that if an SRAM write is attempted after HSB has been
forced low, the write will not occur and the STORE
operation will begin immediately.
Hardware-Store-Busy (HSB) is a high speed, low drive
capability bi-directional control line. In order to allow a
bank of STK12C68-Ms to perform synchronized STORE
functions, the HSB pin from a number of chips may be
connected together. Each chip contains a small inter-
nal current source to pull HSB HIGH when it is not being
driven low. To decrease the sensitivity of this signal to
noise generated on the PC board, it may optionally be
pulled to V
CCX via an external resistor with a value
such that the combined load of the resistor and all
parallel chip connections does not exceed I
OL. Do not connect this or any other pull-up to the
CAP node.
If HSB is to be connected to external circuits other than
other STK12C68-Ms, an external pull-up resistor should
be used.
During any STORE operation, regardless of how it was
initiated, the STK12C68-M will continue to drive the
HSB pin low, releasing it only when the STORE is
complete. Upon completion of a STORE operation, the
part will be disabled until HSB actually goes HIGH.
During normal operation, the STK12C68-M will draw
current from V
CCX to charge up a capacitor connected
to the V
CAP pin. This stored charge will be used by the
chip to perform a single STORE operation. After power
up, when the voltage on the V
CAP pin drops below
SWITCH, the part will automatically disconnect the
CAP pin from VCCX and initiate a STORE operation.
Figure 1 shows the proper connection of capacitors for
automatic store operation. The charge storage capaci-
tor should have a capacity of at least 100
ĀµF (Ā± 20%) at
6V. Each STK12C68-M must have its own 100
Each STK12C68-M
must have a high
quality, high frequency bypass capacitor of 0.1
connected between V
CAP and VSS, using leads and
traces that are as short as possible.
If the
AutoStoreā„¢ function is not required, then V
should be tied directly to the power supply and V
should be tied to ground. In this mode, STORE opera-
tions may be triggered through software control or the
HSB pin. In either event, V
CAP (Pin 1) must always
have a proper bypass capacitor connected to it.
In order to prevent unneeded STORE operations, auto-
matic STOREs as well as those initiated by externally
driving HSB LOW will be ignored unless at least one

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