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AD9735 Datasheet(PDF) 6 Page - Analog Devices |
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AD9735 Datasheet(HTML) 6 Page - Analog Devices |
6 / 42 page AD9736/AD9735/AD9734 Preliminary Technical Data Rev. PrJ | Page 6 of 42 PIN FUNCTION DESCRIPTIONS Pin No. Name Description A1, A2, A3, B1, B2, B3, C1, C2, C3, D2, D3 VDDC 1.8V, Clock supply A4, A5, A6, A9, A10, A11, B4, B5, B6, B9, B10, B11, C4, C5, C6, C9, C10, C11, D4, D5, D6, D9, D10, D11 VSSA Analog supply ground A7, B7, C7, D7 IOUTB DAC negative output, 10mA to 30mA full scale output current A8, B8, C8, D8 IOUTA DAC positive output, 10mA to 30mA full scale output current A12, A13, B12, B13, C12, C13, D12, D13 VDDA 3.3V Analog supply A14, K1 DNC Do Not Connect B14 I120 Nominal 1.2V reference tied to analog ground via 10kohm resistor to generate a 120uA reference current C14 VREF Bandgap voltage reference I/O, tie to analog ground via 1nF capacitor, output impedance approximately 5kohms D1, E2, E3, E4, F2, F3, F4, G1, G2, G3, G4 VSSC Clock supply ground D14 IPTAT Factory test, output current proportional to absolute temperature, approximately 10uA at 25C with approximately 20nA/C slope E1, F1 CLK-, CLK+ Negative, Positive DAC clock input (DACCLK) E11, E12, F11, F12, G11, G12 VSSA Analog supply ground shield E13 IRQ / UNSIGNED If PIN_MODE = 0, IRQ: Active low open-drain interrupt request output, pull up to VDD3.3 with 10kohm resistor If PIN_MODE = 1, UNSIGNED: Digital input pin where 0 = two’s complement input data format, 1 = unsigned E14 RESET / PD If PIN_MODE = 0, RESET: 1 resets the AD9736 If PIN_MODE = 1, PD: 1 puts the AD9736 in the power down state F13 CSB / 2x See SPI and PIN Mode sections for pin description F14 SDIO / FIFO See SPI and PIN Mode sections for pin description G13 SCLK / FSC0 See SPI and PIN Mode sections for pin description G14 SDO / FSC1 See SPI and PIN Mode sections for pin description H1, H2, H3, H4, H11, H12, H13, H14, J1, J2, J3, J4, J11, J12, J13, J14 VDD 1.8V Digital supply K2, K3, K4, K11, K12, L2, L3, L4, L5, L6, L9, L10, L11, L12, M3, M4, M5, M6, M9, M10, M11, M12 VSS Digital supply ground K13, K14 DB<13> -, + Negative, Positive data input bit 13 (MSB), reduced swing LVDS L1 PIN_MODE 0, SPI Mode, SPI enabled 1, PIN Mode, SPI disabled, direct pin control L7, L8, M7, M8, N7, N8, P7, P8 VDD33 3.3V Digital supply L13, L14 DB<12> -, + Negative, Positive data input bit 12, reduced swing LVDS M2, M1 DB<0> -, + Negative, Positive data input bit 0 (LSB), reduced swing LVDS M13, M14 DB<11> -, + Negative, Positive data input bit 11, reduced swing LVDS N1, P1 DB<1> -, + Negative, Positive data input bit 1, reduced swing LVDS N2, P2 DB<2> -, + Negative, Positive data input bit 2, reduced swing LVDS N3, P3 DB<3> -, + Negative, Positive data input bit 3, reduced swing LVDS N4, P4 DB<4> -, + Negative, Positive data input bit 4, reduced swing LVDS N5, P5 DB<5> -, + Negative, Positive data input bit 5, reduced swing LVDS N6, P6 DATACLK_OUT -, + Negative, Positive output clock, reduced swing LVDS N9, P9 DATACLK_IN -, + Negative, Positive data input clock, reduced swing LVDS N10, P10 DB<6> -, + Negative, Positive data input bit 6, reduced swing LVDS N11, P11 DB<7> -, + Negative, Positive data input bit 7, reduced swing LVDS N12, P12 DB<8> -, + Negative, Positive data input bit 8, reduced swing LVDS N13, P13 DB<9> -, + Negative, Positive data input bit 9, reduced swing LVDS N14, P14 DB<10> -, + Negative, Positive data input bit 10, reduced swing LVDS |
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