ADS5413-11

SLWS156 − MARCH 2004

www.ti.com

4

ELECTRICAL CHARACTERISTICS (CONTINUED)

over operating free-air temperature range, clock frequency = 65 MSPS, 50% clock duty cycle (AVDD = OVDD = 3.3 V), duty cylce adjust off,

internal reference, AIN = −1 dBFS, 1.2-VPP square differential clock (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

AC PERFORMANCE (Continued)

fIN = 14 MHz

70

77.7

fIN = 39 MHz

75.8

SFDR

Spurious free dynamic range

fIN = 70 MHz

84.5

dBc

SFDR

Spurious free dynamic range

fIN = 150 MHz

70.5

dBc

fIN = 190 MHz

68.3

fIN = 220 MHz

72.9

fIN = 14 MHz

95

fIN = 39 MHz

94

HD2

Second order harmonic

fIN = 70 MHz

89

dBc

HD2

Second order harmonic

fIN = 150 MHz

79

dBc

fIN = 190 MHz

84.5

fIN = 220 MHz

72

fIN = 14 MHz

77.6

fIN = 39 MHz

75.4

HD3

Third order harmonic

fIN = 70 MHz

85.5

dBc

HD3

Third order harmonic

fIN = 150 MHz

70.5

dBc

fIN = 190 MHz

68.3

fIN = 220 MHz

77.6

Analog input bandwidth

−3 dB BW respect to −3 dBFS input at low

frequency

1

GHz

TIMING CHARACTERISTICS

25

°C, CL = 10 pF

MIN

TYP

MAX

UNIT

td(A)

Aperture delay

2

ns

td(A)

Aperture jitter

0.4

ps

td(Pipe) Latency

6

Cycles

td1

Propagation delay from clock input to beginning of data stable(1)

DCS off, OVDD = 1.8 V

8

ns

td2

Propagation delay from clock input to end of data stable(1)

DCS off, OVDD = 1.8 V

20.3

ns

td1

Propagation delay from clock input to beginning of data stable(1)

DCS off, OVDD = 3.3 V

7

ns

td2

Propagation delay from clock input to end of data stable(1)

DCS off, OVDD = 3.3 V

20.3

ns

td1

Propagation delay from clock input to beginning of data stable(1)

DCS on, OVDD = 1.8 V

10

ns

td2

Propagation delay from clock input to end of data stable(1)

DCS on, OVDD = 1.8 V

22.3

ns

td1

Propagation delay from clock input to beginning of data stable(1)

DCS on, OVDD = 3.3 V

9

ns

td2

Propagation delay from clock input to end of data stable(1)

DCS on, OVDD = 3.3 V

22.3

ns

(1) Data stable if VO < 10% OVDD or VO > 90% OVDD