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IDT707278S15PF Datasheet(PDF) 7 Page - Integrated Device Technology |
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IDT707278S15PF Datasheet(HTML) 7 Page - Integrated Device Technology |
7 / 16 page 6.42 IDT707278S/L 32K x 16 Bank-Switchable Dual-Ported SRAM with External Bank Selects Industrial and Commercial Temperature Ranges 7 AC Test Conditions Figure 1. AC Output Test Load Figure 3. Lumped Capacitance Load Typical Derating Curve AC Electrical Characteristics Over the Operating Temperature and Supply Voltage Range(4) NOTES: 1. Transition is measured 0mV from Low or High-impedance voltage with Output Test Load (Figure 2). 2. This parameter is guaranteed by device characterization, but is not production tested. 3. To access RAM, CE = VIL and MBSEL = VIH. To access mailbox, CE = VIH and MBSEL = VIL. 4. 'X' in part numbers indicates power rating (S or L). 5. Refer to Truth Table I. Input Pulse Levels Input Rise/Fall Times Input Timing Reference Levels Output Reference Levels Output Load GND to 3.0V 3ns Max. 1.5V 1.5V Figures 1,2 and 3 3739 tbl 11 3739 drw 03 893 Ω 30pF 347 Ω 5V DATAOUT INT 893 Ω 5pF* 347 Ω 5V DATAOUT tACE/tAA (Typical, ns) 3739 drw 05 1 2 3 4 5 6 7 8 20 40 100 60 80 120 140 160 180 200 Capacitance (pF) -1 0 - 10pF is the I/O capacitance of this device, and 30pF is the AC Test Load Capacitance 707278X15 Com'l Only 707278X20 Com'l & Ind 707278X25 Com'l & Ind Unit Symbol Parameter Min.Max.Min.Max.Min.Max. READ CYCLE tRC Read Cycle Time 15 ____ 20 ____ 25 ____ ns tAA Address Access Time ____ 15 ____ 20 ____ 25 ns tACE Chip Enable Access Time (3) ____ 15 ____ 20 ____ 25 ns tABE Byte Enable Access Time (3) ____ 15 ____ 20 ____ 25 ns tAOE Output Enable Access Time ____ 9 ____ 10 ____ 11 ns tOH Output Hold from Address Change 3 ____ 3 ____ 3 ____ ns tLZ Output Low-Z Time (1,2) 0 ____ 0 ____ 0 ____ ns tHZ Output High-Z Time (1,2) ____ 8 ____ 9 ____ 10 ns tPU Chip Enable to Power Up Time (2,5) 0 ____ 0 ____ 0 ____ ns tPD Chip Disable to Power Down Time (2,5) ____ 15 ____ 20 ____ 25 ns tMOP Mailbox Flag Update Pulse ( OE or MBSEL)10 ____ 10 ____ 10 ____ ns tMAA Mailbox Address Access Time ____ 15 ____ 20 ____ 25 ns 3739 tbl 12 Figure 2. Output Test Load (for tLZ, tHZ, tWZ, tOW) *Including scope and jig. |
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