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IDT707278S25PFI Datasheet(PDF) 11 Page - Integrated Device Technology |
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IDT707278S25PFI Datasheet(HTML) 11 Page - Integrated Device Technology |
11 / 16 page 6.42 IDT707278S/L 32K x 16 Bank-Switchable Dual-Ported SRAM with External Bank Selects Industrial and Commercial Temperature Ranges 11 NOTES: 1. Transition is measured 0mV from Low or High-impedance voltage with Output Test Load (Figure 2). 2. This parameter is guaranteed by device characterization, but is not production tested. 3. To access RAM, CE = VIL and MBSEL = VIH. To access mailbox, CE = VIH and MBSEL = VIL. Either condition must be valid for the entire tEW time. Refer to Truth Tables I and III. 4. The specification for tDH must be met by the device supplying write data to the RAM under all operating conditions. Although tDH and tOW values will vary over voltage and temperature, the actual tDH will always be smaller than the actual tOW. 5. 'X' in part numbers indicates power rating (S or L). AC Electrical Characteristics Over the Operating Temperature and Supply Voltage(5) Symbol Parameter 707278X15 Com'l Only 707278X20 Com'l & Ind 707278X25 Com'l & Ind Unit Min. Max. Min. Max. Min. Max. WRITE CYCLE tWC Write Cycle Time 15 ____ 20 ____ 25 ____ ns tEW Chip Enable to End-of-Write(3) 12 ____ 15 ____ 20 ____ ns tAW Address Valid to End-of-Write 12 ____ 15 ____ 20 ____ ns tAS Address Set-up Time(3) 0 ____ 0 ____ 0 ____ ns tBS Bank Set-up Time 0 ____ 0 ____ 0 ____ ns tWP Write Pulse Width 12 ____ 15 ____ 20 ____ ns tWR Write Recovery Time 0 ____ 0 ____ 0 ____ ns tDW Data Valid to End-of-Write 15 ____ 15 ____ 20 ____ ns tHZ Output High-Z Time(1,2) ____ 8 ____ 9 ____ 10 ns tDH Data Hold Time(4) 0 ____ 0 ____ 0 ____ ns tWZ Write Enable to Output in High-Z (1,2) ____ 8 ____ 9 ____ 10 ns tOW Output Active from End-of-Write(1,2,4) 3 ____ 3 ____ 3 ____ ns tMWRD Mailbox Write to Read Time 5 ____ 5 ____ 5 ____ ns 3739 tbl 15 |
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